双网传真机的编译码电路设计与实现  

Design and Implementation of Encoding and Decoding Circuit for Dual-network Fax Machine

作　　者：杨婷婷[1] 韩俊刚[1] 衡霞[1] 李平[1] 

机构地区：[1]西安邮电学院,陕西西安710061

出　　处：《现代电子技术》2011年第11期177-180,共4页Modern Electronics Technique

基　　金：双网数字传真机开发及产业化(2008ZKC02-11)陕西省重大科技创新专项项目

摘　　要：对双网数字传真机硬件系统中的编码和译码电路进行设计,并采用FPGA芯片进行系统实现和验证。其中的编译码电路分别采用两级编码和快速译码的思路,利用硬件描述语言设计和仿真,简化了逻辑电路的实现。验证测试表明,该电路增强了系统的稳定性和可靠性,提高了编译码效率,缩短了开发周期。The encoding and decoding circuit in hardware system of dual-network digital facsimile machine was designed.FPGA chip is adopted for the realization and validation of the system.The idea of two-stage coding and quick decoding was employed in the coding and decoding circuit of the system.The logical circuit was simplified with HDL design and simulation.The verification testing result shows that the circuit enhances the stability and reliability of the system,improves the encoding and decoding efficiency,and shortens the development cycle.

关 键 词：编译码电路 FPGA 码表 双网传真机 

分 类 号：TN911-34[电子电信—通信与信息系统]