1.8V音频Σ-Δ调制器的设计  

Design of a 1.8 V Σ-Δ Modulator for Audio Application

作　　者：周鹏坤[1] 景新幸[1] 

机构地区：[1]桂林电子科技大学信息与通信学院,广西桂林541004

出　　处：《微电子学》2011年第3期359-362,共4页Microelectronics

基　　金：国家自然科学基金资助项目(609661002)

摘　　要：介绍了一种适用于语音信号处理的16位24 kHzΣ-Δ调制器。该电路采用单环三阶单比特量化形式,利用Matlab优化调制器系数。电路采用SIMC 0.18μm CMOS工艺实现,通过Cadence/Spectre仿真器进行仿真。仿真结果显示,调制器在128倍过采样率时,带内信噪比达到107 dB,满足设计要求。A 16-bit 24 kHz Σ-Δ modulator for speech signal processing was presented.A single-loop 3rd-order single-bit structure was adopted for the modulator,and coefficients of the modulator were optimized with Matlab.Implemented in SIMC＇s 0.18 μm CMOS technology,the circuit was simulated with Cadence/Spectre emulator.Simulation results showed that the modulator achieved an SNDR of 107 dB with an oversampling ratio of 128,which is in accordance with the design target.

关 键 词：Σ-Δ调制器 CMOS 开关电容积分器 运算放大器 

分 类 号：TN710.2[电子电信—电路与系统]