一种基于环振的SRAM型FPGA延迟测试方法  

A Novel Test Method for Delay in SRAM FPGA Based on Ring Oscillator

作　　者：杨金孝[1] 郭德春[1] 陈雷[2] 张永波[1] 杨永坤[1] 

机构地区：[1]西北工业大学,西安710129 [2]北京微电子技术研究所,北京100076

出　　处：《微电子学》2011年第3期470-473,共4页Microelectronics

摘　　要：提出一种使用环形振荡器对SRAM型FPGA内部延迟进行精确测试的方法。该方法利用SRAM型FPGA的可重构性在其内部构造环形振荡器,通过基准信号对分频后的振荡信号周期进行测量,从而得到环振回路中逻辑部件的延迟值。应用该方法,对一款Virtex-4型FPGA的内部延迟进行测试。结果表明:在环振初始振荡频率小于芯片工作极限频率的情况下,延迟测试的误差小于1 ps,与其他检测FPGA内部延迟故障的方法相比,检测精度有很大的提高,同时,该方法对SRAM型FPGA具有较高的普遍适用性。A novel test method for delay in SRAM FPGA based on ring oscillator was presented.A ring oscillator was configured in the targeted FPGA,and the oscillating signal was divided and the signal cycle was measured by standard clock,so that the delay of the logic block and interconnect located in the ring oscillator could be measured with high resolution.The strategy was implemented on a Virtex-4 FPGA.Experimental results showed that,when initial oscillating frequency of the ring oscillator was below the extreme operating frequency of the chip,the error of the delay test was less than 1 ps.Compared with other methods,the proposed technique is more accurate and adaptable to SRAM FPGA.

关 键 词：环形振荡器 FPGA 延迟 测试 

分 类 号：TP303[自动化与计算机技术—计算机系统结构]