基于SOPC的神经监测系统的设计与实现  

An SOPC-based Design and Implementation of Neural Monitoring System

作　　者：彭俊淇[1] 黄启俊[1] 常胜[1] 毛雪莹[1] 马启明[1] 周游[2] 

机构地区：[1]武汉大学物理科学与技术学院电子科学与技术系,武汉430072 [2]武汉科技大学附属天佑医院,武汉430070

出　　处：《中国生物医学工程学报》2011年第3期421-427,共7页Chinese Journal of Biomedical Engineering

摘　　要：神经外科手术是目前广泛应用的一种临床手术,作为其中的关键辅助技术,神经监测技术可准确及时地了解神经状态,减轻医生的工作压力,预防神经损伤。设计一款基于SOPC的神经监测系统,系统模拟电路和数字电路紧密结合,采用硬件电路与NIOS II嵌入式软件协同设计的方法,利用乒乓操作、串并转化、流水线等技术手段对设计进行优化,并使用嵌入式逻辑分析仪对系统功能进行分析验证.结果表明,系统时序、数据转换和传输正常。系统的软硬件构建在Terasic公司的DE0平台上,共消耗7 613个逻辑单元,硬件最高工作频率达到125.74 MHz,软件最高工作频率达到119.76 MHz。Neurosurgery is widely used in clinical application.As the key neurosurgery assistive technology for neurosurgery,neural monitoring is used to real-time accurately monitor neural state and effectively prevent nerve injury.In this paper,an SOPC-based neural monitoring system is presented.This system integrates analog circuits with digital circuits and cooperate hardware circuits with NIOS II embedded software.To optimize the system,ping-pong operation,serial to parallel conversion and pipeline are employed.The function of system is tested by embedded logic analyzer.It is showed that the system sequence,data conversion and transmission are normal.The whole design is completed on a Cyclone III-based development board,DE 0.The resource consumption is 7 516 logic elements and the maximum hardware-work-frequency could achieve 125.74 MHz while the software-work-frequency is 119.76 MHz.

关 键 词：神经信号 术中神经监测 可编程片上系统(SOPC) 现场可编程门阵列(FPGA) 

分 类 号：R318[医药卫生—生物医学工程]