2.4 GHz CMOS高线性功率放大器  

A 2.4 GHz CMOS High Linear Power Amplifier

作　　者：付健[1] 黄煜梅[1] 洪志良[1] 

机构地区：[1]复旦大学专用集成电路与系统国家重点实验室,上海201203

出　　处：《固体电子学研究与进展》2011年第3期240-244,共5页Research & Progress of SSE

基　　金：国家高科技研究发展计划(863计划)资助项目(2009AA01Z261)

摘　　要：采用A类与B类并联的结构,设计了一种2.4GHz高线性功率放大器。输入信号较小时,A类放大器起主要作用;随着输入信号的增大,B类放大器起的作用越来越明显,来补偿A类的压缩,由此显著提高了放大器的线性度。电路主体为共栅管采用自偏置方法的共源共栅结构,提升了功放大信号工作时的可靠性。电路采用中芯国际0.13μm CMOS工艺流片验证。除输入输出匹配网络和平衡非平衡转换器Balun外,其余元器件均片内集成。测试结果表明,在3.3 V电源电压下,功率增益为9.6 dB,1 dB压缩点处输出功率大于10.6 dBm,双音测试中单音输出功率为0.3 dBm时,三阶交调分量为-40 dBc。芯片尺寸为1.5 mm×1 mm。A 2.4 GHz high linear power amplifier （PA） with a parallel class A＆B structure is presented. The class A amplifier is the primary contributor for the transeonductance when the input power is low, and the class B amplifier will be the primary contributor at high power levels. As a result, the class B amplifier can compensate for the compression of the class A amplifier, which can improve the linearity significantly. The cascode transistors are self-biased to improve the reliability. The PA was fabricated in a 0.13 tzm CMOS process. All the devices are on chip except the input/output matching network and the baluns. Measurement results show that the power gain is 9.6 dE and the output power at the 1 dB compression point is larger than 10. 6 dBm under a single supply voltage of 3.3 V. The measured IMD3 is -40 dBc at around 0. 3 dBm output power （one-tone each） in two-tone test. The die size is 1.5 ram× 1 mm.

关 键 词：功率放大器 A/B类 自偏置 线性度 

分 类 号：TN722.75[电子电信—电路与系统] TN432