基于Avalon总线的图像解压缩IP核设计  

The design of image decompression IP core based on the standard of Avalon

作　　者：何伟[1] 王艳[1] 张玲[1] 邬丽娜[1] 

机构地区：[1]重庆大学通信工程学院,重庆400044

出　　处：《电子技术应用》2011年第7期144-147,150,共5页Application of Electronic Technique

摘　　要：介绍了基于Avalon总线的静态图像压缩标准JPEG基本模式解码器软IP核的设计和实现。IP核采用流水线和模块化的设计方法,分别设计各个模块完成其独立的功能,然后将这些模块组成一个顶层模块,采用Avalon总线接口,利用SOPC Builder工具将IP核集成到系统中。该IP核极大地提高了解码速度,具有可移植性,可以方便地集成到手机、数码相机等数字产品中。The paper introduce the design and realization of JPEG image decompression IP core based on the standard of Avalon.Every module was designed respectively in the way of pipeline and modularization.Then these module were made up top-level module,used Avalon bus interface and SoPC Builder,intergrating the IP core in the system.The IP greatly improves the decoding speed and have expansibility,can be integrated into various digital application such as cell phone and camara.

关 键 词：JPEG 解压缩 IP AVALON 

分 类 号：TP751[自动化与计算机技术—检测技术与自动化装置]