高性能PLC专用指令集处理器设计与仿真  

Design and Simulate High Performace ASIP for PLC

作　　者：曾舒婷[1,2] 杨志家[1] 

机构地区：[1]中国科学院沈阳自动化研究所工业信息学重点实验室,辽宁沈阳110016 [2]中国科学院研究生院,北京100039

出　　处：《微电子学与计算机》2011年第7期76-81,共6页Microelectronics & Computer

摘　　要：该高性能PLC专用指令集处理器采用自主设计的PLC专用指令集,符合PLC指令特征,可减少该PLC专用指令集处理器执行的指令数,并采用32位RISC体系结构加快PLC程序的执行速度.该高性能PLC专用指令集处理器采用哈佛总线结构,寄存器组采用位编址模式,位处理器可加速PLC布尔运算,功能块单元可提高功能块指令执行的精度,并采用四级流水线提高PLC指令的执行速度.现已完成了该高性能PLC专用指令集处理器的系统功能仿真,经测试仿真结果正确.The PLC ASIP adpots PLC special instruction set,which is consistent with the character of PLC instructions.The PLC special instruction set can reduce the number of instructions and accelerate the executing speed of PLC program by 32 bit RISC architecture.The designed architecture of the high performance ASIP for PLC adopts harvord bus architecture,the registers adopts bit addressing mode,the bit processor can accelerate bool operation,the function block unit can improve the precision of function block execution,the high performance ASIP for PLC adopts four pipelines to speed up the PLC instruction execution.The systemic functional simulation of the high performance ASIP for PLC has been finished,and the result of simulation is correct after testing.

关 键 词：PLC 专用指令集 专用指令集处理器 RISC体系结构 四级流水线 

分 类 号：TP36[自动化与计算机技术—计算机系统结构]