CPLD在数字频率计设计中的应用  

Designing Digital Cymometer Based on CPLD

作　　者：徐瑞亚[1] 邹传琴[1] 宁向前[1] 毛鹏翔[1] 孙月娥[1] 

机构地区：[1]南京信息职业技术学院电子信息学院,南京210046

出　　处：《信息化研究》2011年第3期30-32,共3页INFORMATIZATION RESEARCH

摘　　要：文章论述了基于单片机和CPLD的等精度数字频率计的设计方法,等精度的测量方法具有较高的测量精度和整个频率区域保持恒定测试精度的特点。该频率计利用单片机完成整个测量电路的数据处理、测试控制和显示输出,利用CPLD来实现频率、周期、脉宽和占空比的测量计数。本频率计包括硬件电路和软件编程两部分,硬件电路主要包括电源模块、输入信号整形模块、键控制模块、显示模块、单片机和CPLD模块。CPLD采用VHDL硬件描述语言,单片机采用C语言编程。This paper mainly discusses a method of designing the digital cymometer of equal-accuracy based on MCU and CPLD. The equal-accuracy measurement not only has higher measuring precision, but also can keep invariable measuring precision on whole band of frequency. This cymometer uses the MCU to realize testing control, data processing and displaying output. CPLD can be used to realize measuring the count of frequency, period, pulse width and duty cycle. This cymometer contains hardware circuits and software, hardware circuits contain power supply module, shaping module of input signal, controlling module of keyboard, display module, MCU control module and CPLD control module. CPLD chip adopts VHDL language, and MCU adopts C language .

关 键 词：数字频率计 可编程逻辑器件 硬件描述语言 单片机 等精度 

分 类 号：TN45[电子电信—微电子学与固体电子学]