基于DSP的DFT鉴相数字锁相策略研究及应用  

Design and Application of Digital PLL with DFT Algorithm Based on DSP

作　　者：张靖[1] 洪磊[1] 谢川[1] 陈国柱[1] 

机构地区：[1]浙江大学电气工程学院,浙江杭州310027

出　　处：《电力电子技术》2011年第7期83-85,共3页Power Electronics

基　　金：教育部新世纪人才资助计划(060512)~~

摘　　要：准确而快速地跟踪电网电压的频率及相位是保证电力电子装置具有良好的稳态和动态性能的一个重要前提。首先分析了用DSP实现的传统离散傅里叶变换(DFT)鉴相软件锁相方法,在此基础上改进并设计了滑窗DFT鉴相软件锁相环(PLL)。与传统DFT PLL相比,滑窗DFT PLL具有更好的效果,并在实际应用中得到验证。Tracking of grid voltage frequency and phase accurately and fast plays an important role in ensuring the power electronic devices＇ good steady-state and dynamic performance.It studies the realization method of digital phase locked loop （PLL） based on traditional discrete fourier transform-phase detection （DFT-PD） at first, then, an improved sliding window DFF-PD based on PLL is proposed and achieved with DSP.The experimental results verify the sliding window DFT-PD PLL has a better performance and practical application waves are also given out.

关 键 词：锁相环 离散傅里叶变换 数字信号处理器 滑窗 

分 类 号：TN911.8[电子电信—通信与信息系统]