快速单精度浮点运算器的设计与实现  

Design and implementation of fast single-precision floating-point arithmetic unit

作　　者：田红丽[1,2] 闫会强[1] 赵红东[2] 

机构地区：[1]河北工业大学计算机科学与软件学院,天津300401 [2]河北工业大学信息工程学院,天津300130

出　　处：《河北工业大学学报》2011年第3期74-78,共5页Journal of Hebei University of Technology

基　　金：河北省自然科学基金(F2007000096)

摘　　要：浮点运算单元FPU(Floating-point Unit)在当前CPU的运算中地位越来越重要,论文中实现了一种基于FPGA的快速单精度浮点运算器.该运算器采用了流水线和并行计算技术,使得浮点数运算的速度有了显著的提高.在QUARTUSII 7.1系统上对运算器已仿真成功,结果表明它可以运行在40.5MHz时钟工作频率下,能快速准确地完成各种加、减、乘和除算术运算.It is the trend to adopt the Floating-point Unit（FPU）in the structure of CPU.A fast single precision floating point arithmetic unit is proposed and realized based on the FPGA.Pipelining and parallel processing are applied to the arithmetic unit,so that floating point operation speed has been significantly improved.The successful simulation results on QUARTUSII 7.1 show that the arithmetic unit can operate at 40.5 MHz clock frequency and complete all kinds of addition,subtraction,multiplication and division operations quickly and accurately.

关 键 词：FPGA(现场可编程逻辑门阵列) 单精度 并行处理 并行加法器 阵列乘法器 阵列除法器 

分 类 号：TP323[自动化与计算机技术—计算机系统结构]