基于Simulink的数字下变频器设计及其FPGA实现  

Design of digital down converter based on simulink and implementing it with FPGA

作　　者：李闯泽[1] 张回园[1] 李剑[1] 张波涛[1] 

机构地区：[1]中北大学信息探测与处理技术研究所,山西太原030051

出　　处：《电子测试》2011年第7期60-62,共3页Electronic Test

摘　　要：数字下变频是数字接收机中一个重要组成部分,实现将高速ADC转换后的数字信号进行抽取和滤波,得到低速的数字基带信号。针对传统模拟接收机系统带宽较窄,系统体积大,同时缺少灵活性的缺点,本文利用MATLAB的Simulink工具箱结合Altera公司的DspBuilder软件,仿真和设计了一体积较小(只需要一片FPGA)、可灵活配置的中频数字宽带接收机,并进行了FPGA的硬件实现。实验结果表明:设计的数字中频接收机具有系统带宽较宽,体积较小,可以进行灵活的配置,能满足不同的性能要求等优点。Digital Down-Converter（DDC） is an important part in the digital receivers.The DDC performes to convert the high speed ADC data to a low speed baseband signal by decimating and filtering. The disadvantages of traditional analog receiver are that have narrow system bandwidth, big system volume and less flexibility faults. Simulated and designed a digital intermediate frequency receiver with small volume（only needs a singlechip ） ,flexible configuration and is implemented it with FPGA, by using Matlab Simulink toolbox and Dsp Builder software of Altera company. The results indicate that the advantages of the designed digital intermediate frequency receiver have the wider system bandwidth, small volume, flexible configuration, and meet different performance requirements, etc.

关 键 词：数字下变频 宽带接收机 可编程逻辑门阵列 

分 类 号：TN773[电子电信—电路与系统] TN791