基于FPGA的DSP外部总线接口设计  

DSP External Bus Interface Design Based on FPGA

作　　者：高路 周起华 张琦 

机构地区：[1]上海无线电设备研究所,上海200090

出　　处：《制导与引信》2011年第2期20-23,共4页Guidance & Fuze

摘　　要：文章针对FPGA与DSP之间的总线协议,建立FPGA与DSP总线通信的接口框架,根据不同类型的DSP设计相应的时序协调电路,保证DSP与外部器件之间高速稳定的数据通信。使用该设计方法在Quartus Ⅱ进行仿真,时序满足DSP的读写时序要求。实验证明该方法满足实际使用要求。The bus interface frame is built in the FPGA,and the time-sequence harmonized circuit is designed according to different object which is accessed by the DSP,which ensure that the DSP could access outer bus interface with highest speed.Finally,simulations are done,which indicate that the time-sequence is satisfied with the DSP demand,and the time margin is enough to the requirement of application.

关 键 词：数字信号处理 总线 接口 

分 类 号：TJ765.3[兵器科学与技术—武器系统与运用工程]