2-4混值/8值绝热加减法计数器开关级设计  

Design of 2-4 mixed-valued/eight-valued up-down counter on switch-level

作　　者：高虹[1] 汪鹏君[1] 

机构地区：[1]宁波大学电路与系统研究所,浙江宁波315211

出　　处：《浙江大学学报（理学版）》2011年第4期409-414,418,共7页Journal of Zhejiang University（Science Edition）

基　　金：国家自然科学基金资助项目(60776022;61076032;60971061);浙江省自然科学基金资助项目(Z1111219;Y1101078);浙江省科技厅项目(2010C31012;2011R09021-04);浙江省大学生科研创新团队资助项目

摘　　要：通过对8值逻辑编码技术、绝热电路和加减法计数器工作原理及结构的研究,提出带进位/借位的2-4混值/8值绝热加减法计数器设计方案.首先,该方案以开关信号理论为指导,分别推导出2-4混值/8值触发型绝热正循环门和进位/借位电路的开关级结构式,然后利用多阈值NMOS管和交叉存贮结构实现相应电路,并在此基础上实现带进位/借位的2-4混值/8值加减法计数器.最后,PSPICE模拟验证所设计的电路具有正确的逻辑功能,在55.6 MHz工作频率下,与常规CMOS 2-4混值/8值加减法计数器相比,节省功耗约95%.rough the study of eight-valued logic coding technique and the working principle and structure of adiabatic circuits and up-down counter,a design scheme of 2-4 mixed-valued/eight-valued adiabatic up-down counter with carry/borrow was proposed.First,the switch-level functional expressions of 2-4 mixed-valued/ eight-valued adiabatic loop operation circuits and carry/borrow circuit were derived under the guidance of switch-signal theory in the scheme.Then,the corresponding circuits can be realized by using NMOS transistors with different threshold and cross-memory structure,and 2-4 mixed-valued/eight-valued adiabatic up-down counter with carry/borrow is come true by using the design scheme.PSPICE simulation results verified the valid functionality of these circuits,which can save about 95% energy compared with conventional CMOS 2-4 mixed-valued/eight-valued up-down counter at the same frequency 55.6 MHz.

关 键 词：开关信号理论 2-4混值 8值逻辑 加减法计数器 低功耗 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]