基于SOPC的逻辑分析IP核设计  

Design of a logic analysis IP core based on SOPC

作　　者：付平[1] 徐聪[1] 尹洪涛[1] 

机构地区：[1]哈尔滨工业大学自动化测试与控制系,哈尔滨150001

出　　处：《电子测量技术》2011年第7期75-79,共5页Electronic Measurement Technology

摘　　要：设计了1种Avalon总线接口的逻辑分析IP核和完整的逻辑分析仪SOPC系统。该系统具备对待测信号进行电平、边沿组合触发,以及多条件顺序触发的能力,触发位置精确可调;能够实现循环存储、分段存储等功能,采样点数连续可调;集成USB2.0 ULPI接口IP核,可以实现高速数据通信;使用了Nios II处理器,并最大限度的优化了中断响应速度。经过在Cyclone III FPGA上实际验证,各项逻辑分析功能工作正常。In this paper,a complete logic analyzer SOPC system design with an Avalon compatible logic analysis IP core is presented.The SOPC system has combined level and edge trigger function,multistage trigger function,and trigger position adjust function.And cyclical or segmental storage function with adjustable depth is also achieved.USB2.0 ULPI IP core and Nios II processor with high interruption performance are integrated to communicate with PC and to control the analyzer functions.The SOPC system is tested with a Cyclone III FPGA.

关 键 词：逻辑分析仪 可编程片上系统 AVALON总线 

分 类 号：TP274.2[自动化与计算机技术—检测技术与自动化装置]