SDR中新型自适应复分接芯片的板级验证  

Board-Level Verification of the New Adaptive Muldex Chip in SDR

作　　者：赵秋明[1] 张云佐[1] 

机构地区：[1]桂林电子科技大学信息与通信学院,广西桂林541004

出　　处：《微电子学》2011年第4期515-519,共5页Microelectronics

基　　金：广西信息与通讯技术重点实验室基金资助项目(PS090149)

摘　　要：针对多用户型软件无线电(SDR)的发展需求,基于FPGA,采用新型时钟提取方案,设计实现了自适应数字复分接芯片的板级验证平台,详细阐述了平台的软、硬件设计及自适应实现过程,给出了平台的各项测试指标。测试结果表明,该平台可满足数字复分接芯片的验证需求。To satisfy requirement of the development of multi-user software-defined radio（SDR）,a platform for board-level verification of adaptive digital muldex chip was designed based on FPGA,using a novel clock recovery scheme.Design process of both software and hardware were described in detail,along with implementation of adaptive process.Specification for platform test was provided.Test results showed that the platform can meet the requirements for verification of digital muldex chips.

关 键 词：自适应 脉冲检测 时钟提取 复分接 软件无线电 

分 类 号：TN914[电子电信—通信与信息系统]