基于集成门电路的三值单稳态触发器研究  

The Research on Ternary Mono-stable Flip-Flops Based on Integrated Gate Circuits

作　　者：汪鹏君[1] 夏银水[2] 吴训威[2] 

机构地区：[1]宁波师范学校,宁波315010 [2]宁波大学电路与系统研究所,宁波315211

出　　处：《电路与系统学报》1999年第4期91-94,共4页Journal of Circuits and Systems

基　　金：浙江省自然科学基金;宁波市青年科学基金

摘　　要：通过对二值单稳态触发器设计原理的重新归纳，本文从三值三稳态触发器的正确设计出发，提出了二种三值单稳态触发器的设计方案。以RC微分电路为定时电路的设计已用PSPICE程序进行计算机验证。结果表明所设计的二种三值单稳态触发器具有正确的功能。与二值单稳态触发器相比，它们具有更强的功能并能在实用设计中获得更广泛的应用。Starting from the fundamental design principle of binary mon0-stable flip-flops, this paper proposes twodesigns of ternary mono-stable flip-flops, which are based on the design of ternary three-stable-state flip-flops. These twodesigns using RC differential circuit as the timer unit are verified by PSPICE simulation. Simulation result proves that twokinds of ternary mon0-stable flip-flops have correct logic function. Compared with binary mono-stable flip-flops, ternarymono-stable flip-flops have robust function and can be widely applied into design practice.

关 键 词：单稳态触发器 电路设计 数字电路 

分 类 号：TN783.02[电子电信—电路与系统]