通用视频输出控制器IP核的低功耗设计  

Low Power-Consumption IP Core Design on for Universal Video Output Controller

作　　者：徐永钊[1] 范丽仙[1] 曾志峰[1] 李洪涛[1] 

机构地区：[1]东莞理工学院,广东东莞523808

出　　处：《通信技术》2011年第8期142-145,共4页Communications Technology

基　　金：东莞市科技计划项目(No.2008108101002;No.200910814033);广东省自然科学基金项目(No.10451170003004948)

摘　　要：随着芯片的集成度越来越高,芯片的功耗成为芯片设计中越来越重要的优化参数。设计了一种可应用于视频处理芯片、多媒体手持设备、嵌入式SoC等系统中的视频输出控制器。设计中通过多种工艺无关的低功耗设计技术优化控制器的动态功耗。首先分析各子模块的工作频率,降低低速子模块的工作时钟,然后通过添加门控时钟单元降低时钟的翻转次数。应用Design Compiler[1]进行工程的功耗分析,结果表明设计中使用的低功耗设计方法有效降低了模块的动态功耗。With high-level integration of the chip,power consumption increasingly becomes a most important parameter in chip optimal design.This paper proposes a video output controller,which could be applied in video processing chips,multimedia handheld devices,embedded SoC systems and so on.The independent and low power-consumption design technology could optimize the dynamic power consumption of the controller.By analyzing the working frequency of each sub-module the clock frequency of the low-speed sub-module is decreased first,and then the number of clock turns reduced by adding clock-gating cell.Finally,design compiler is employed to analyze the project,and the result indicates that the low-power design technologies could effectively reduce the dynamic power-consumption of the module.

关 键 词：视频输出控制器 低功耗 知识产权核 功耗分析 

分 类 号：TN43[电子电信—微电子学与固体电子学]