应用于数字锁相环的NCO设计  

Design of number controlled oscillator applied in digital PLL

作　　者：保玲[1] 佘世刚[1] 周毅[1] 金玉琳[1] 

机构地区：[1]兰州空间技术物理研究所,甘肃兰州730000

出　　处：《电子设计工程》2011年第14期160-162,共3页Electronic Design Engineering

摘　　要：本文鉴于数字锁相环在实际应用中对信号频率的准确度和稳定度有较为严格的要求,设计一种应用于数字锁相环的数控振荡器(NCO,Number Controlled Oscillator)。基于直接数字频率合成(DDS)技术,介绍NCO工作原理,基于FPGA实现NCO,关键是相位累加器与波形存储器两个模块的设计,并利用QUARTUS对设计结果进行编译仿真。对NCO杂散信号进行频谱分析,并提出解决方法。该设计有效抑制杂散,修改灵活,便于调试,在数字锁相环设计中可有广泛应用。Based on the high standard for veracity and stability of signal frequency applied in digital PLL,a kind of NCO（Number Controlled Oscillator） is designed applied in digital PLL.Based on DDS（Direct Digital Frequency Synthesizers）,the basic principle of NCO is introduced,NCO is realized based on FPGA.The key point is how to design phase accumulator and ROM,the design result is complied and simulated with applied software tool QUARTUS.The frequency spectrum of NCO is analyzed,and the resolve measure is given.This design can control spurious,modify conveniently,it has widely application in design of digital PLL.

关 键 词：NCO DDS 杂散 FPGA 

分 类 号：TN802[电子电信—信息与通信工程]