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机构地区:[1]Institute of Microelectronics,Nankai University [2]School of Electronics Information Engineering,Tianjin University of Technology
出 处:《Optoelectronics Letters》2011年第5期341-345,共5页光电子快报(英文版)
摘 要:Frequency synthesizer is an important part of optical and wireless communication system. Low power comsumption prescaler is one of the most critical unit of frequency synthesizer. For the frequency divider, it must be programmable for channel selection in multi-channel communication systems. A dual-modulus prescaler (DMP) is needed to provide variable division ratios. DMP is considered as a critical power dissipative block since it always operates at full speed. This paper introduces a high speed and low power complementary metal oxide semiconductor (CMOS) 15/16 DMP based on true single-phase-clock (TSPC) and transmission gates (TGs) cell. A conventional TSPC is optimized in terms of devices size, and it is resimulated. The TSPC is used in the synchronous and asynchronous counter. TGs are used in the control logic. The DMP circuit is implemented in 0.18 μm CMOS process. The simulation results are provided. The results show wide operating frequency range from 7.143 MHz to 4.76 GHz and it comsumes 3.625 mW under 1.8 V power supply voltage at 4.76 GHz.
关 键 词:CMOS integrated circuits Communication systems Frequency synthesizers Global system for mobile communications Metallic compounds MOS devices Wireless telecommunication systems
分 类 号:TN772[电子电信—电路与系统]
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