Partial-SOI high voltage P-channel LDMOS with interface accumulation holes  

作　　者：吴丽娟 胡盛东 罗小蓉 张波 李肇基 

机构地区：[1]State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China [2]College of Communication Engineering, Chengdu University of Information Technology [3]College of Communication Engineering, Chongqing University

出　　处：《Chinese Physics B》2011年第10期373-378,共6页中国物理B（英文版）

基　　金：supported by the National Natural Science Foundation of China (Grant Nos. 60806025 and 60976060);the Funds of the National Laboratory of Analog Integrated Circuit (Grant No. 9140C0903070904);the Youth Teacher Foundation of the University of Electronic Science and Technology of China (Grant No. jx0721)

摘　　要：A new partial SOI （silion-on-insulator） （PSOI） high voltage P-channel LDMOS （lateral double-diffused metal-oxide semiconductor） with an interface hole islands （HI） layer is proposed and its breakdown characteristics are investigated theoretically. A high concentration of charges accumulate on the interface, whose density changes with the negative drain voltage, which increase the electric field （Er） in the dielectric buried oxide layer （BOX） and modulate the electric field in drift region . This results in the enhancement of the breakdown voltage （BV）. The values of E1 and BV of an HI PSOI with a 2-~m thick SOI layer over a 1-~tm thick buried layer are 580V/~m and -582 V, respectively, compared with 81.5 V/p.m and -123 V of a conventional PSOI. Furthermore, the Si window also alleviates the self-heating effect （SHE）. Moreover, in comparison with the conventional device, the proposed device exhibits low on-resistance.A new partial SOI （silion-on-insulator） （PSOI） high voltage P-channel LDMOS （lateral double-diffused metal-oxide semiconductor） with an interface hole islands （HI） layer is proposed and its breakdown characteristics are investigated theoretically. A high concentration of charges accumulate on the interface, whose density changes with the negative drain voltage, which increase the electric field （Er） in the dielectric buried oxide layer （BOX） and modulate the electric field in drift region . This results in the enhancement of the breakdown voltage （BV）. The values of E1 and BV of an HI PSOI with a 2-~m thick SOI layer over a 1-~tm thick buried layer are 580V/~m and -582 V, respectively, compared with 81.5 V/p.m and -123 V of a conventional PSOI. Furthermore, the Si window also alleviates the self-heating effect （SHE）. Moreover, in comparison with the conventional device, the proposed device exhibits low on-resistance.

关 键 词：interface charges breakdown voltage partial-SOI accumulation holes self-heating effect 

分 类 号：TN386.1[电子电信—物理电子学]