一种新型高线性度采样开关的设计  

A New Design of High-linearity Sample Switch

作　　者：胡炜[1] 何明华[1] 

机构地区：[1]福州大学物理与信息工程学院,福建福州350002

出　　处：《电子科技》2011年第10期1-3,10,共4页Electronic Science and Technology

基　　金：福建省科技重大专项"多功能网络数字媒体终端核心芯片及其应用平台研发及产业化"基金资助项目(2009HZ0007-1);福建省科技厅基金资助项目(2009HZ0007-1)

摘　　要：设计了一种应用于流水线ADC中的新型高线性度采样开关,该开关采用比较器、反相器链、CMOS对管开关,自举电容等实现,具有较高的线性度。其基本原理为:使MOS管栅极电压实时跟随输入电压,保证其差值恒定,从而实现整体采样保持电路较高的无杂散动态范围。通过Flip-around型采样保持电路进行验证,其无杂散动态范围可达91 dB,满足设计要求。This paper introduces a new sampling switch used in pipeline ADC. The switch has high-linearity property by using comparator, inverters chains, CMOS switching, and capacitance. In order to improve the Spurious Free Dynamic Range （ SFDR）, the basic principle is to ensure MOSFET gate voltage to follow the input voltage, thus the voltage across them being a constant value. Finally Flip-around sample-and-hold circuit is used to verify the new switch. Test results show that this new architecture has 91dB SFDR, which meets the design requirements.

关 键 词：采样开关 栅源跟随 高线性度 

分 类 号：TM564[电气工程—电器]