Searching for complete set of free resource rectangles on FPGA area based on CPTR  

作　　者：柴亚辉 沈文枫 徐炜民 刘觉夫 郑衍衡 

机构地区：[1]School of Computer Engineering and Science,Shanghai University [2]School of Information Engineering,East China Jiaotong University

出　　处：《Journal of Shanghai University(English Edition)》2011年第5期391-396,共6页上海大学学报（英文版）

基　　金：Project supported by the Shanghai Leading Academic Discipline Project(Grant No.J50103);the Natural Science Foundation of Jiangxi Province(Grant No.2010GZS0031);the Science Technology Project of Jiangxi Province(Grant No.2010BGB00604)

摘　　要：As a coprocessor, field-programmable gate array （FPGA） is the hardware computing processor accelerating the computing capacity of coraputers. To efficiently manage the hardware free resources for the placing of tasks on FPGA and take full advantage of the partially reconfigurable units, good utilization of chip resources is an important and necessary work. In this paper, a new method is proposed to find the complete set of maximal free resource rectangles based on the cross point of edge lines of running tasks on FPGA area, and the prove process is provided to make sure the correctness of this method.As a coprocessor, field-programmable gate array （FPGA） is the hardware computing processor accelerating the computing capacity of coraputers. To efficiently manage the hardware free resources for the placing of tasks on FPGA and take full advantage of the partially reconfigurable units, good utilization of chip resources is an important and necessary work. In this paper, a new method is proposed to find the complete set of maximal free resource rectangles based on the cross point of edge lines of running tasks on FPGA area, and the prove process is provided to make sure the correctness of this method.

关 键 词：field-programmable gate array （FPGA） partially dynamic reconfigure maximal free rectangle occupied rectangle 

分 类 号：TN791[电子电信—电路与系统] TP391.3[自动化与计算机技术—计算机应用技术]