Analysis and design of sigma-delta interface circuit for quartz flexural pendulum accelerometer  

石英挠性摆式加速度计sigma-delta接口电路的分析与设计(英文)

作　　者：周薇[1] 蔡体菁[1] 

机构地区：[1]东南大学仪器科学与工程学院,南京210096

出　　处：《Journal of Southeast University(English Edition)》2011年第3期266-269,共4页东南大学学报（英文版）

基　　金：The National High Technology Research and Development Program of China (863 Program) ( No. 2006AA12Z302)

摘　　要：For the high resolution required in a digital interface circuit of an accelerometer used in feeble gravity measurement, a switched-capacitor （SC） sigma-delta modulator （SDM） is proposed. Based on the principle and the topology structure of the SDMs, the influence of oversampling ratio, bits of an internal quantizer and the cascaded structure on weak signal detecting precision is analyzed, and an ideal low-distortion SDM with a second-order 1-bit structure satisfying the high- resolution interface circuit of an accelerometer is designed. With the research on non-idealities of each SDM block in the SC circuit implementation and their impacts on power consumption, the realized parameters of low-power SDMs based on different bandwidths are devised and the power consumption of each SDM is estimated. Time-domain behavioral simulation is explored based on Simulink. The results demonstrate that a 21- bit resolution of the designed SDMs can be achieved on the premise of low power, and the parameters for the circuit implementation can be directed to the transistor-level circuit design.针对微弱重力信号测量中加速度计的数字输出接口电路应具有高分辨率的问题,引入了开关电容(SC)sigma-delta调制器(SDM).基于SDM的工作原理和拓扑结构,分析了过采样比、内部量化器位数以及级联结构对提高微弱信号检测精度的影响,设计了满足加速度计接口电路高分辨率要求的理想二阶1位低失真SDM结构.通过研究各模块在SC电路实现中的非理想特性及其对电路功耗的影响,设计了基于不同带宽的低功耗SDM实现参数,给出了相应的功耗估计.利用Simulink对各设计方案进行了时域的行为级仿真.结果表明,所设计SDM在低功耗的前提下其分辨率可达21位以上,其电路实现参数可用于指导晶体管级电路设计.

关 键 词：switched-capacitor （SC） circuit modulator （SDM） high resolution NON-IDEALITY low sigma-delta power 

分 类 号：V411[航空宇航科学与技术—航空宇航推进理论与工程] U666.1[交通运输工程—船舶及航道工程]