利用DSP底层结构提高MPEG-4编码的实时性  

Improvement of real-time properties of MPEG-4 encoder by DSP underlying structure

作　　者：李桂菊[1] 

机构地区：[1]中国科学院长春光学精密机械与物理研究所,吉林长春130033

出　　处：《中国光学》2011年第5期461-467,共7页Chinese Optics

基　　金：国家自然科学基金资助项目(No.60805045)

摘　　要：由于利用TMS320C6000系列的DSP底层结构可以提高图像压缩的实时性,本文在TMS320C6416平台上针对DSP底层结构对MPEG-4视频编码进行了优化,包括对8个运算单元能并行执行的特性进行汇编。针对DSP芯片两级高速缓存的工作特点,对编码器中代码和数据所占用的内存空间进行优化。利用EDMA级联特性在内存开辟双缓冲区,同时完成视频数据编码和传输的工作,从而有效地改善编码效率。实验结果表明:该编码器可以对512 pixel×512 pixel大小的灰度图像,以30 frame/s帧频进行压缩,实现了对视频图像的实时编码。As the real time properties of image compression can be improved by utilizing a DSP underlying structure,this paper optimizes the Mpeg-4 video encoder on a TMS320C6416 platform by the structure mentioned above.Optimizing methods include complying the assembly functions according to the characteristics of eight parallel execution functional units,optimizing the code and data memory space occupied by the encoder according to the features of DSP two-level cache,and adapting two buffers in memory by using the EDMA cascade characteristics to realize video data coding and transmission at the same time,which improves coding efficiency effectively.The experimental results show that the new encoder can realize encoding of gray scale video of 512 pixel×512 pixel at 30 frame/s in real time.

关 键 词：视频压缩 数字信号处理器 软件优化 

分 类 号：TN919.81[电子电信—通信与信息系统]