高压BCDMOS集成电路的工艺集成  

The Process Integration of High-Voltage BCDMOS IC

作　　者：马旭[1] 邵志标[1] 姚剑锋 张国光 

机构地区：[1]西安交通大学电信学院,陕西西安710049 [2]佛山蓝箭电子有限公司,广东佛山528000

出　　处：《微电子学与计算机》2011年第11期72-75,共4页Microelectronics & Computer

摘　　要：对高压BCD-MOS器件的结构和工艺进行了研究,用器件模拟MEDICI和工艺模拟T-SUPREM软件分别对器件结构和工艺参数进行了设计优化.在工艺兼容的前提下,设计制作了包含NPN、PNP、NMOS、PMOS、高压LDMOS等结构的BCDMOS集成电路样管.测试结果表明,样管性能与模拟结果相符.The structure and process of high voltage BCDMOS are studied and optimized in this paper. The BCD- MOS IC includes NPN, PNP, NMOS, PMOS and high voltage LDMOS structure. The emphasis of the process is to implement these devices on one chip and optimize the structures and process of these devices. The process simulation software T--SUPREM and device simulation software MEDICI are used to optimize the devices structure and process parameters. The BCDMOS IC＇ s which accord with the design request are taped out and the BCDMOS process are developed finally.

关 键 词：高压BCD集成电路 横向双扩散MOS器件 工艺集成 工艺兼用 

分 类 号：TN433[电子电信—微电子学与固体电子学]