双模系统信道估计FFT处理器的硬件实现  

Hardware Implementation of FFT Processor for Dual-mode System Channel Estimation

作　　者：陈琛[1] 杨玉庆[1] 闫娜[1] 

机构地区：[1]复旦大学专用集成电路与系统国家重点实验室,上海201203

出　　处：《计算机工程》2011年第21期205-207,共3页Computer Engineering

基　　金：国家"863"计划基金资助重点项目(2009AA011605)

摘　　要：针对GSM/TD-SCDMA双模系统的信道估计问题,设计一个32/128点可配置的FFT/IFFT处理器。采用一种新的4路MRMDF结构同时处理4路信号,并支持4路多输入多输出系统。仿真结果表明,该处理器能以较少的硬件消耗使数据吞吐率提高4倍,在110 MHz的时钟下,功耗仅为46.8 mW。The paper presents a configurable 32/128 FFT/IFFT processor which is designed for the channel estimation of GSM/TD-SCDMA dual-mode communication system.A novel four-channel Mixed-radix Multipath Delay Feedback（MRMDF） architecture is applied in the processor.The proposed architecture can handle four-channel signal,and is suitable for 4-channel Multiple-Input and Multiple-Output（MIMO） systems.The data throughput rate can have a 4-fold increase by less hardware consumption.The design is verified by the Altera platform and synthesized in the 0.18 μm 1P6M technology.The power consumption is about 46.8 mW.

关 键 词：双模系统 信道估计 可配置处理器 多输入多输出 数据吞吐率 

分 类 号：TP331[自动化与计算机技术—计算机系统结构]