Implementation and evaluation of parallel FFT on Engineering and Scientific Computation Accelerator (ESCA) architecture  

作　　者：Dan WU Xue-cheng ZOU Kui DAI Jin-li RAO Pan CHEN Zhao-xia ZHENG 

机构地区：[1]Department of Electronic Science ＆： Technology, Huazhong University of Science and Technology, Wuhan 430074, China

出　　处：《Journal of Zhejiang University-Science C(Computers and Electronics)》2011年第12期976-989,共14页浙江大学学报C辑（计算机与电子（英文版）

基　　金：Project supported by the National Natural Science Foundation of China (Nos.60973035 and 60976027);the Natural Science Foundation of Hubei Province,China (No.2010CDB02705)

摘　　要：The fast Fourier transform (FFT) is a fundamental kernel of many computation-intensive scientific applications.This paper deals with an implementation of the FFT on the accelerator system,a heterogeneous multi-core architecture to accelerate computation-intensive parallel computing in scientific and engineering applications.The Engineering and Scientific Computation Accelerator (ESCA) consists of a control unit and a single instruction multiple data (SIMD) processing element (PE) array,in which PEs communicate with each other via a hierarchical two-level network-on-chip (NoC) with high bandwidth and low latency.We exploit the architecture features of ESCA to implement a parallel FFT algorithm efficiently.Experimental results show that both the proposed parallel FFT algorithm and the ESCA architecture are scalable.The 16-bit fixed-point parallel FFT performance of ESCA is compared with a published work to prove the superiority of the mapping algorithm and the hardware architecture.The floating-point parallel FFT performances of ESCA are evaluated and compared with those of the IBM Cell processor and GPU to demonstrate the computing power of the ESCA system for high performance applications.The fast Fourier transform （FFT） is a fundamental kernel of many computation-intensive scientific applications. This paper deals with an implementation of the FFT on the accelerator system, a heterogeneous multi- core architecture to accelerate computation-intensive parallel computing in scientific and engineering applications. The Engineering and Scientific Computation Accelerator （ESCA） consists of a control unit and a single instruction multiple data （SIMD） processing element （PE） array, in which PEs communicate with each other via a hierarchical two-level network-on-chip （NoC） with high bandwidth and low latency. We exploit the architecture features of ESCA to implement a parallel FFT algorithm efficiently. Experimental results show that both the proposed parallel FFT algorithm and the ESCA architecture are scalable. The 16-bit fixed-point parallel FFT performance of ESCA is compared with a published work to prove the superiority of the mapping algorithm and the hardware architecture. The floating-point parallel FFT performances of ESCA are evaluated and compared with those of the IBM Cell processor and GPU to demonstrate the computing power of the ESCA system for high performance applications.

关 键 词：Fast Fourier transform （FFT） MULTI-CORE Parallel computing SIMD 

分 类 号：TP302.7[自动化与计算机技术—计算机系统结构]