串行Flash在图像存储系统中的应用  

Application of Serial Flash in the Image Saving System

作　　者：张博[1] 张刚[1] 

机构地区：[1]太原理工大学信息工程学院,山西太原030024

出　　处：《电视技术》2011年第23期40-43,共4页Video Engineering

基　　金：国家自然科学基金项目(60772101)

摘　　要：介绍串行SPI接口Flash存储器M25P64的工作原理,利用该Flash作为FPGA的代码配置芯片,同时用作图像存储系统的存储器。在图像采集系统中,利用DDR SDRAM存储器作为帧缓存,将需要存储的图像先写入DDR存储器,写入一帧图像后,从DDR中每次连续读出一行图像数据至Flash写缓冲,经Flash控制器模块写入Flash,直至一帧数据被写入。存储图像回放时,从Flash中每次连续读取一行数据写入Flash读缓冲,从读缓冲中将数据读出并写入到DDR存储器,一帧图像读出写入DDR后,从DDR中读取数据输出到后端显示模块,则存储图像可回读并显示。该设计在ISE10.1开发环境下用VHDL语言实现,并在Xilinx XC3S400A FPGA上验证。The paper introduces the operating principle of serial Flash M25P64 with SPI bus interface. The Flash is used as code configuration memory of FPGA, and is also used as image memory in image saving system. In image capturing system, using DDR SDRAM as frame buffer, the image which will be saved is written to DDR firstly. Then it reads one line image data from DDR and the data is written to Flash Writing Buffer every time. The Flash Controller reads the data from the buffer and writes it to Flash, until the whole frame data is written to Flash. In order to display the saved data in Flash, it reads one line data from Flash and the data is written to DDR, using the Flash Reading Buffer as line buffer. When a frame data is written to DDR from Flash, it reads the data from DDR and the data is transmitted to Back-end Display module, so the image saved in Flash will be displayed. The whole design is realized in ISE10.1 developing environment with VHDL, and is verified on Xilinx XC3S400A FPGA.

关 键 词：串行FLASH DDR SDRAM 图像存储 FPGA 

分 类 号：TN492[电子电信—微电子学与固体电子学] TP333[自动化与计算机技术—计算机系统结构]