Plane级的闪存固态盘并行调度算法  

Plane-level parallel scheduling algorithm for flash memory based SSD

作　　者：周华[1] 郑先容[2] 汤浪平[2] 

机构地区：[1]国防科学技术大学计算机学院,湖南长沙410073 [2]广东药学院医药信息工程学院,广东广州510002

出　　处：《计算机工程与设计》2011年第12期4048-4051,共4页Computer Engineering and Design

基　　金：国家自然科学基金项目(60736013;60903040)

摘　　要：为有效缓解固态盘的存储瓶颈问题,针对闪存固态盘内部芯片的工作原理和物理特性,将并行调度技术引入闪存固态盘的闪存转换层(FTL)的设计中,设计并实现了一种plane级的并行调度算法,基本方法就是将一个读写请求分解成多个段,在多个plane上并行的执行,通过更均衡的分配I/O负载,可以显著提高闪存固态盘的整体读写性能。通过设置不同的芯片参数进行了模拟与测试,实验结果表明,采用并行调度技术可以有效提高闪存固态盘中存储芯片之间的并行度,以及芯片内部各个单元之间的并行度,闪存固态盘的读写延时均有较大改善。In order to relieve the problem of storage bottleneck,with considering the physical characteristics of flash memory based SSD（solid state drive）,a plane-level parallel scheduling algorithm is presented.The fundamental method is to divide an I/O require into several fragments,and to execute these fragments in parallel on the multiple planes.By setting different parameters of chips for testing and analysis,how parallel scheduling affects both the speed of read and write and the performance of flash solid-state disk is studied.With a flash memory array simulator,the simulation experiment shows that the parallel scheduling technique could effectively improve the parallelism among the inside plane units of flash chips,and the read and write performance are improved greatly.

关 键 词：闪存固态盘 plane级 并行调度 闪存转换层 负载均衡 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]