A low power mixed signal DC offset calibration circuit for direct conversion receiver applications  

作　　者：杨利君 袁芳 龚正 石寅 陈治明 

机构地区：[1]Department of Electronic Engineering,Xi'an University of Technology [2]Suzhou-CAS Semiconductors Integrated Technology Research Center [3]Department of Electronic Engineering

出　　处：《Journal of Semiconductors》2011年第12期134-138,共5页半导体学报（英文版）

摘　　要：A low power mixed signal DC offset calibration （DCOC） circuit for direct conversion receiver applica- tions is designed. The proposed DCOC circuit features low power consumption, fast settling time and a small die area by avoiding the trade-off between loop response time and the high pass frequency of the DCOC servo loop in conventional analog DCOC systems. By applying the proposed DC offset correction circuitry, the output residue DC offset voltages are reduced to less than 38 mV and the DCOC loop settling time is less than 100 μs. The DCOC chip is fabricated in a standard 0.13μm CMOS technology and drains only 196 μA from a 1.2-V power supply with its chip area of only 0.372 ×0.419 mm^2.A low power mixed signal DC offset calibration （DCOC） circuit for direct conversion receiver applica- tions is designed. The proposed DCOC circuit features low power consumption, fast settling time and a small die area by avoiding the trade-off between loop response time and the high pass frequency of the DCOC servo loop in conventional analog DCOC systems. By applying the proposed DC offset correction circuitry, the output residue DC offset voltages are reduced to less than 38 mV and the DCOC loop settling time is less than 100 μs. The DCOC chip is fabricated in a standard 0.13μm CMOS technology and drains only 196 μA from a 1.2-V power supply with its chip area of only 0.372 ×0.419 mm^2.

关 键 词：mixed signal DC offset calibration analog to digital converter digital control logic unit digital toanalog converter least significant bit 

分 类 号：TN851[电子电信—信息与通信工程] TN43