Algorithm/Architecture Co-design of Edge Enhanced Compressed Domain Deblocking Filtering  

作　　者：ZHU-Fang WU Jianhui SHI Longxing 

机构地区：[1]National ASIC System Engineering Research Center, Southeast University, Nanjing 210096, China

出　　处：《Chinese Journal of Electronics》2011年第4期597-602,共6页电子学报（英文版）

摘　　要：This paper presents a new edge extrac- tion based compressed domain deblocking algorithm and its ASIP （Application specific instruction processor） archi- tecture for video decoding based on algorithm and archi- tecture co-design methodology. Our algorithm works very stable and robust no mater under low bit rate compres- sion or high bit rate compression scenarios. The VLIW （Very long instruction world） based ASIP implementation of our algorithm proves high performance with very limited hardware cost. The Algorithm and architecture co-design （AAC） concept is highly emphasized in this paper. We provide some quantitative example to show the necessity of algorithm and architecture co-design.

关 键 词：Algorithm and architecture co-design DEBLOCKING Compressed domain ASIP architecture. 

分 类 号：TN911.7[电子电信—通信与信息系统] TN919.81[电子电信—信息与通信工程]