基于DSP的FPGA配置方法研究与实现  

Research and Implement of FPGA Configuration with DSP

作　　者：李飞飞[1] 苏延川[1] 王鹏[1] 

机构地区：[1]中国空空导弹研究院,河南洛阳471009

出　　处：《现代电子技术》2011年第24期60-62,共3页Modern Electronics Technique

摘　　要：在数字电路中,FPGA+DSP的系统结构应用日益广泛。为了减小此种结构的体积和降低成本,对FPGA采用了被动并行的配置方式。上电后,DSP首先完成自身程序的加载,之后充当配置FPGA的主处理器,从FLASH芯片中读取FPGA程序,按照配置时序完成FPGA的程序加载。在硬件设计上,创新性地采用了DSP,FPGA,FLASH共用数据总线的方式,当DSP从FLASH芯片中读取FPGA程序时,FPGA可以直接抓取出现在总线上数据来完成加载。实践证明,此种配置方法结构简洁,工作稳定,在一定程度上实现了小型化和低成本。In digital circuits,the system structure of FPGA＋DSP is widely used.To reduce the volume and cost of system structure,the slave SelectMAP configuration method is adopted for FPGA.After power on,DSP completes loading of its programme firstly,then acts as the primary processor of configuring FPGA to read the FPGA programme from FLASH chip,and fulfils the task of programme loading of FPGA according to the configuration time sequence.In hardware design,a new method of sharing the data bus of DSP,FPGA and FLASH is innovatively used.FPGA can catch the data appearing in the bus to complete the loading when DSP reads FPGA programme from FLASH.The configuration circuit is compact and works well in practice.The method implemented miniaturization and low cost in some degree.

关 键 词：FPGA DSP 配置 被动并行 小型化 

分 类 号：TN710-34[电子电信—电路与系统]