DM6467与DDR2之间的PCB布线及信号完整性分析  

The PCB Layout between DM6467 and DDR2 and the Signal Integrity Analysis

作　　者：胡彪[1] 

机构地区：[1]北京邮电大学自动化学院,北京100876

出　　处：《自动化技术与应用》2011年第12期53-56,共4页Techniques of Automation and Applications

摘　　要：在以DM6467为核心芯片的视频处理系统的PCB制作中,DM6467与DDR2之间的PCB布线及其信号完整性分析占据了重要地位,决定了整个系统成功与否。由于DM6467和DDR2都具有相当高的工作频率,所以他们之间的走线必须满足高速PCB布线规则,还要结合实际系统中的层叠、阻抗等,采取特殊布线方法。对于系统中的端接、串扰、电磁兼容、差分设计等,需要通过仿真软件进行信号完整性分析,然后对其进行修改设计,使其满足系统要求。In a PCB production of video processing system with its core chip is DM6467,the PCB layout between DM6467 and DDR2 and the signal integrity analysis occupy an important position, they determine the success of the entire system. As the DM6467 and DDR2 has a very high work speed, so the PCB layout between them should be high-speed PCB layout, and combine with the stack and resistance of the actual system, take special method. For the system＇s termination, crosstalk, electromagnetic compatibility, differential design etc, they need to take the signal integrity analysis with simulation software, and then modify the design to meet system requirements.

关 键 词：DM6467 DDR2 PCB布线 信号完整性仿真 

分 类 号：TN948.4[电子电信—信号与信息处理]