PCB板时钟电路的电磁兼容设计  被引量:15

EMC design of clock circuit on PCB

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作  者:谢如元[1] 施佳林[1] 

机构地区:[1]海军装备研究院标准规范研究所,上海200235

出  处:《现代电子技术》2012年第2期142-144,147,共4页Modern Electronics Technique

摘  要:为了研究PCB集成电路板中时钟引起的电磁兼容问题,采用了仿真数值计算的方法,对时钟电路的电磁兼容设计时几种主要影响因素进行分析研究,确定了在PCB集成电路板设计时的时钟选择原则,以及时钟电路电磁兼容设计时的具体对象和内容,通过优化时钟设计的布局和布线来达到提高了PCB板电磁兼容设计。最后提出了可以有效切断PCB板上时钟干扰传播途径的几种措施,为工程技术人员提供一种解决相关问题的思路。In order to solve the electromagnetic compatibility (EMC) problem caused by the clock in PCB integrated circuit boards, the method of simulation numerical calculation is adopted to analyze the main influence factors in the EMC design of the clock circuit, confirme the clock selection principles in PCB integrated circuit board design, and ensure the concrete object and content in EMC design of the clock circuit. The PCB EMC design was improved by the optimization of the layout and wir ing in clock design. Finally, several measures which can effectively cut the propagating way of clock interference on PCB are brought forward. It provides an idea of solving the relevant problems for engineering and technical personnel.

关 键 词:PCB板 时钟信号 电磁兼容设计 仿真数值计算 

分 类 号:TN919-34[电子电信—通信与信息系统]

 

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