一种低压高频CMOS电流乘法器的设计  

Design of low-voltage high-frequency CMOS current multiplier

作　　者：解鸿国[1] 

机构地区：[1]广西师范大学电子工程学院,广西桂林541004

出　　处：《现代电子技术》2012年第2期165-167,共3页Modern Electronics Technique

基　　金：国家自然科学基金项目(61061006);广西研究生教育创新计划资助项目(2010106020809M50)

摘　　要：提出了一种新颖的高频四象限电流乘法器电路,该乘法器使用了工作在三极管区的互补MOS器件,并且采用了饱和区MOS管的平方律特性。该电路采用0.35μm CMOS工艺,使用HSpice软件仿真。仿真结果显示,该乘法器电路在±1.18V的电源电压下工作时,静态功耗为1.18mW,-3dB带宽可达到1.741GHz。与先前的电流乘法器电路相比,工作电压降低了,带宽提高了。A new high-frequency four-quadrant current multiplier is presented. The current multiplier uses complementary MOS devices working in triode region and adopts the squarelaw characteristic of saturated MOS transistor. The circuit employs 0.35btm technique of CMOS. The results of HSPICE simulation show that the proposed multiplier has a static-state power dissipation of 1.18 mW and the cut-off frequency is 1. 741 GHz when multiplier circuit works at the supply voltage of ±1.18 V. Compared with the previous current multiplier circuits, this multiplier circuit can work at lower voltage and higher frequency.

关 键 词：CMOS电流乘法器 低压 高频 电流减法器 

分 类 号：TN919-34[电子电信—通信与信息系统]