PCI总线故障注入器的研究与设计  

Research and design of fault injector for PCI bus

作　　者：唐志敏[1] 董剑[1] 吴智博[1] 杨孝宗[1] 

机构地区：[1]哈尔滨工业大学计算机科学与技术系,黑龙江哈尔滨150001

出　　处：《计算机工程与设计》2012年第1期173-179,共7页Computer Engineering and Design

基　　金：国家863高技术研究发展计划基金项目(2008AA01A201);哈尔滨工业大学优秀青年教师培养计划基金项目(HITQNJS.2009.053)

摘　　要：为了评测计算机系统及其外设的可靠性,研究了PCI总线的拓扑结构和电气规范,分析了传统硬件嵌入式故障注入方法在PCI总线上的局限性,提出了一种新的基于PCI-to-PCI桥接IP(intellectual property,知识产权)核和FPGA技术的嵌入式故障注入方案,解决了PCI总线故障注入中的时延难题,可以向总线上的主设备和从设备注入多种类型的故障。设计了故障注入器的硬件结构和FPGA逻辑,分析了开发PCI故障注入器时需要注意的问题。针对一个典型的PCI外设进行了故障注入实验,结果表明,该方案是可行的,其功能满足设计要求。To evaluate the reliability of computer systems and peripherals, the topology and electrical specifications of PCI bus is studied. The limitation of the traditional hardware-embedded fault injection method is analyzed, and a new method based on PCI- to-PCI Bridge IP （intellectual property） core and FPGA technology is presented. This method, which can inject various types of failures into the bus master and slave, solved the delay problem in fault injection of PCI. Hardware of injector and logic in FPGA is designed and some announcements in the development of PCI fault injector are presented. At last, experiments are carried out on a typical PCI peripheral. Experimental results show that this method is feasible, and its functions meet the design requirements.

关 键 词：故障注入 外部设备互联 硬件嵌入式 知识产权核 现场可编程门阵列 

分 类 号：TP302.8[自动化与计算机技术—计算机系统结构]