The breakdown mechanism of a high-side pLDMOS based on a thin-layer silicon-on-insulator structure  

作　　者：赵远远 乔明 王伟宾 王猛 张波 

机构地区：[1]State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China

出　　处：《Chinese Physics B》2012年第1期524-528,共5页中国物理B（英文版）

基　　金：Project supported by National Natural Science Foundation of China(Grant No.60906038)

摘　　要：A high-side thin-layer silicon-on-insulator （SOI） pLDMOS is proposed, adopting field implant （FI） and multiple field plate （MFP） technologies. The breakdown mechanisms of back gate （BG） turn-on, surface channel punch-through, and vertical and lateral avalanche breakdown are investigated by setting up analytical models, simulating related parameters and verifying experimentally. The device structure is optimized based on the above research. The shallow junction achieved through FI technology attenuates the BG effect, the optimized channel length eliminates the surface channel punch-through, the advised thickness of the buried oxide dispels the vertical avalanche breakdown, and the MFP technology avoids premature lateral avalanche breakdown by modulating the electric field distribution. Finally, for the first time, a 300 V high-side pLDMOS is experimentally realized on a 1.5 μm thick thin-layer SOI.A high-side thin-layer silicon-on-insulator （SOI） pLDMOS is proposed, adopting field implant （FI） and multiple field plate （MFP） technologies. The breakdown mechanisms of back gate （BG） turn-on, surface channel punch-through, and vertical and lateral avalanche breakdown are investigated by setting up analytical models, simulating related parameters and verifying experimentally. The device structure is optimized based on the above research. The shallow junction achieved through FI technology attenuates the BG effect, the optimized channel length eliminates the surface channel punch-through, the advised thickness of the buried oxide dispels the vertical avalanche breakdown, and the MFP technology avoids premature lateral avalanche breakdown by modulating the electric field distribution. Finally, for the first time, a 300 V high-side pLDMOS is experimentally realized on a 1.5 μm thick thin-layer SOI.

关 键 词：field implant technology back gate punch-through surface channel punch-through avalanche breakdown 

分 类 号：TN386.1[电子电信—物理电子学]