基于DICache的混合线索解释执行技术  

A DICache-Based Hybrid Threaded Interpretation Technique

作　　者：陈微[1] 王志英[1] 陈顼颢[1] 沈立[1] 陆洪毅[1] 肖侬[1] 

机构地区：[1]国防科学技术大学计算机学院,湖南长沙410073

出　　处：《计算机工程与科学》2012年第2期50-55,共6页Computer Engineering & Science

基　　金：国家973计划资助项目(2007CB310901);国家自然科学基金资助项目(60803041)

摘　　要：由解释执行实现的指令集仿真是解决二进制兼容问题的有效手段。解释执行各步骤的组织方式对解释器性能有着重要影响。集中方式效率较低,而效率较高的线索方式由于译码过程过于复杂而无法用于CISC指令集的解释执行。本文提出了一种基于DICache的混合线索解释执行技术,DICache实现一种高效的硬件动态预译码,将源指令转换为一种中间表示,在解释例程中对DICache快速访问实现对CISC指令集的线索解释执行。本文在一个源为IA-32、目标为VLIW的解释器上,采用SPEC INT2000中的测试程序对基于DICache的混合线索解释执行技术进行评估。结果表明该方法可以显著提高解释器的性能。Interpretation-based instruction set emulation provides a solution to the binary compatibility problem.The organization of the interpretation process has great impact on the performance of an interpreter.Centralized interpretation is inefficient while the traditional threaded interpretation is not suitable for interpreting the CISC Instruction Set Architecture （ISA） because of the complicated instruction decoding process.We propose a DICache-based hybrid interpretation technique.DICache can dynamically predecode the source instruction and convert them into an intermediate form.The DICache access code is appended at the end of each interpreter routine,which enables the threaded interpretation for CISC ISA.We implement an interpreter which interprets the IA-32 instructions on VLIW.We conduct some benchmarks from SPEC INT 2000 to evaluate the performance of the novel threaded interpretation method.It is demonstrated that DICache-based hybrid threaded interpretation can significantly improve the performance of an interpreter.

关 键 词：二进制兼容 指令集仿真 线索解释执行 DICache 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]