基于集成计数器的N进制计数器设计与仿真  

Design and simulation on modulo-N counter based on integrated counter

作　　者：赵家松[1] 周兵[1] 严伟榆[1] 

机构地区：[1]云南农业大学基础与信息工程学院,云南昆明650201

出　　处：《电子设计工程》2012年第4期27-30,共4页Electronic Design Engineering

基　　金：云南省教育厅科学研究基金项目(09C0284)

摘　　要：计数器是一种重要的时序逻辑电路,广泛应用于各类数字系统中。介绍以集成计数器74LS161和74LS160为基础,用归零法设计N进制计数器的原理与步骤。用此方法设计了3种36进制计数器,并用Multisim10软件进行仿真。计算机仿真结果表明设计的计数器实现了36进制计数的功能。基于集成计数器的N进制计数器设计方法简单、可行,运用Multisim 10进行电子电路设计和仿真具有省时、低成本、高效率的优越性。Counter is a kind of important sequential logic circuit model. It has been widely used in a variety of digital systems. A design method of modulo-N counter with integrated counter is presented. Three kinds of modulo-36 counter are designed and simulation by this method. The computer simulation results show that the design implements modulo-36 counter. The design method of modulo-N counter with integrated counter is simple and feasible. This design and simulation based on Multisiml0 has many advantages, such as time-saving, low in cost and efficient.

关 键 词：电路设计 仿真 计数器 归零法 MULTISIM10 

分 类 号：TN791[电子电信—电路与系统] TP391.9[自动化与计算机技术—计算机应用技术]