Analysis of the breakdown mechanism for an ultra high voltage high-side thin layer silicon-on-insulator p-channel low-density metal-oxide semiconductor  

Analysis of the breakdown mechanism for an ultra high voltage high-side thin layer silicon-on-insulator p-channel low-density metal-oxide semiconductor

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作  者:庄翔 乔明 张波 李肇基 

机构地区:[1]State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China

出  处:《Chinese Physics B》2012年第3期405-410,共6页中国物理B(英文版)

基  金:Project supported by the National Natural Science Foundation of China (Grant No. 60906038)

摘  要:This paper discusses the breakdown mechanism and proposes a new simulation and test method of breakdown voltage (BV) for an ultra-high-voltage (UHV) high-side thin layer silicon-on-insulator (SOI) p-channel low-density metal- oxide semiconductor (LDMOS). Compared with the conventional simulation method, the new one is more accordant with the actual conditions of a device that can be used in the high voltage circuit. The BV of the SOI p-channel LDMOS can be properly represented and the effect of reduced bulk field can be revealed by employing the new simulation method. Simulation results show that the off-state (on-state) BV of the SOI p-channel LDMOS can reach 741 (620) V in the 3μm-thick buried oxide layer, 50μm-length drift region, and at -400 V back-gate voltage, enabling the device to be used in a 400 V UHV integrated circuit.This paper discusses the breakdown mechanism and proposes a new simulation and test method of breakdown voltage (BV) for an ultra-high-voltage (UHV) high-side thin layer silicon-on-insulator (SOI) p-channel low-density metal- oxide semiconductor (LDMOS). Compared with the conventional simulation method, the new one is more accordant with the actual conditions of a device that can be used in the high voltage circuit. The BV of the SOI p-channel LDMOS can be properly represented and the effect of reduced bulk field can be revealed by employing the new simulation method. Simulation results show that the off-state (on-state) BV of the SOI p-channel LDMOS can reach 741 (620) V in the 3μm-thick buried oxide layer, 50μm-length drift region, and at -400 V back-gate voltage, enabling the device to be used in a 400 V UHV integrated circuit.

关 键 词:silicon on insulator breakdown voltage back-gate voltage p-channel low-density metaloxide-semiconductor 

分 类 号:TN304.21[电子电信—物理电子学] TM71[电气工程—电力系统及自动化]

 

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