改进适应度评价的多态自检电路进化设计算法  

Evolutionary Design Algorithm for Polymorphic Self-checking Circuits Based on Improved Fitness Evaluation

作　　者：柏磊[1] 朱晓华[1] 

机构地区：[1]南京理工大学电子工程与光电技术学院,南京210094

出　　处：《科技导报》2012年第7期23-28,共6页Science & Technology Review

基　　金：南京理工大学自主科研专项计划项目(2010ZYTS028);南京理工大学科研启动基金项目

摘　　要：针对传统多态自检电路进化设计算法适应度评价阶段丢失潜在解的问题,提出了一种改进适应度评价方法。利用扩展评价将传统算法中随机选择输出位对候选电路进行评价的方法改进为完全评价方法,通过动态选择输出位对电路做出最恰当的评价,防止潜在解的丢失;对于多态电路扩展评价结果采用比较选择选取在多种工作模式下适应度最高的输出位,完成进化电路最优结构配置。外部进化设计实验结果表明,所提方法仅需4个测试向量就能检测出组合电路中的所有固定性故障。电路中不需额外的输入/输出信号,通过加法器进位输出位的震荡可以指出错误的存在,同时电路原始输入信号即可作为检测输入信号。与传统进化设计算法相比,进化代数减少了90.6%—91.7%,成功获得最优解时电路使用门个数减少8%—9.7%,具有进化迭代次数少和资源消耗低等优点。In order to deal with the problem that in the stage of fitness evaluation while the traditional evolutionary design algorithm is used for polymorphic self-checking circuits, the potential solution is lost, therefore, an improved fitness evaluation method is proposed. As the candidate circuit is evaluated by randomly selecting the output in the traditional algorithm, the fitness evaluation expansion is introduced to adopt full evaluation. The dynamic selection of the output is used to make the most appropriate evaluation for the candidate circuits, avoiding the loss of potential solution. Regarding the result of fitness evaluation expansion for polymorphic circuits, the comparison and selection are proposed to chooce the output with the highest fitness under the both modes, and then the optimal structure is configured. The simulation results of the extrinsic evolution show that the proposed method is able to detect all the stuck-at-faults in the combinational circuits, only using four test vectors. Additional input or output signals are not needed to indicate the faults in the circuits. The carry-out output of the adder is used to show the faults based on oscillations and the original input signals of the circuits could be used as the test signals. Comparing with the traditional evolutionary design algorithm, the evolution generation and the gate number in the circuit are decreased by 90.6%--91.7% and 8%--9.7% respectively. The proposed method gains the advantages of less iterations and lower resources consumption.

关 键 词：改进适应度评价 多态电路 自检电路 进化设计 

分 类 号：TN47[电子电信—微电子学与固体电子学]