Trace生成对大规模并行性能模拟的影响及其改进策略  

Evaluation of the Trace Effects in Large-Scale Parallel Performance Simulation and Discussion of Some Resolutions

作　　者：徐传福[1] 王荣[2] 车永刚[1] 王正华[1] 

机构地区：[1]国防科学技术大学计算机学院,湖南长沙410073 [2]漯河职业技术学院,河南漯河462000

出　　处：《计算机工程与科学》2012年第3期67-73,共7页Computer Engineering & Science

基　　金：国家863计划资助项目(2007AA01Z116);国家自然科学基金资助项目(60603055)

摘　　要：Trace生成是trace驱动体系结构模拟中不可或缺的步骤。Trace不仅需要占用大量存储空间,其生成过程还可能对目标应用程序的模拟执行产生一定程度的干扰,导致性能数据误差。Trace驱动并行性能模拟器由于其设计实现特点和所运行的宿主并行平台的多样性,使得trace生成的影响具有其独特性。本文选取典型并行模拟器BigSim和若干具有不同计算通信比的目标并行程序,在三个支持不同traceI/O方式的宿主机平台上设计实验评估了trace生成对并行性能模拟的影响,结果表明trace生成对模拟效率和精度均有较大的影响,并分析了这种影响与并行模拟器实现和宿主机平台I/O方式的关系,进而讨论了几种可行的改进方案,对trace驱动并行模拟器设计、实现和使用具有一定的指导意义。Trace generation is an inevitable step in trace-driven architecture simulation. Traces not only consume large-scale storage space, but also may introduce extra intrusions to the execution of benchmarks which can result in errors of the simulation results. The trace effect of parallel trace-driven simulators has its own unique characteristics due to the design and implementation of the simulators as well as particular I/O systems of parallel hosts. We select BigSim, a typical parallel simulator, and several target parallel applications with different computation and communication ratios to evaluate the trace effect on 3 parallel host systems with different I/O modes. Our results show that trace generation has a non-ignorable effect on both efficiency and accuracy of parallel simulation. The reasons of the trace effect and some possible resolutions are also discussed. The conclusion of our evaluation is helpful to the design, implementation and use of trace-driven parallel architecture simulators.

关 键 词：踪迹 并行性能模拟 踪迹I/O 体系结构 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]