BPGR积木块自动布局和总体布线系统  

BPGR An automatic Design System for Building-block Placement and Global Routing

作　　者：陈洪亮[1] 王东生[1] 庄镇泉[1] 

机构地区：[1]中国科技大学电子技术基础部

出　　处：《中国科学技术大学学报》1990年第2期149-158,共10页JUSTC

摘　　要：超大规模集成电路(VLSI)的积木块布局布线是一个非常复杂的问题.本文介绍了我们自行研制的VLSI 积木块布局和总体布线系统BPGR.该系统包括积木划分、布局优化、通道划分、总体布线、交互式布局布线调整等过程.BPGR系统能最有效地利用芯片资源和最大限度地提高芯片性能·编程和实验证明,BPGR系统是VLSI 积木块布局布线设计的有效工具.The VLSI building-block placement and routing is a very complex problem. In this paper,a VLSI building-block placement and global routing system BPGR,which is developed by ourselves,is introduced.System BPGR inclu- dings the following subroutines,building-block partition,placement optimization, assignment of routing channel,global routing interactive improvements for placement and routing,and so on.BPGR can effectively utilize chip sources and raise the chip's properties as much as possible.It has proved by prog- ramming and experiments that system BPGR is an effective tool for VLSI building-block placement and routing design.

关 键 词：VLSI设计 布局 总体布线 

分 类 号：TP391.7[自动化与计算机技术—计算机应用技术]