多路低相差输出捷变频率源的设计与实现  

Design and Implementation of Multi-output Low Phase Difference Agile Frequency Source

作　　者：高青春[1] 安雷[1] 彭易[1] 牛伟[1] 唐小艳[1] 成斌[1] 陶毅[1] 章露[1] 黄俊[1] 戴梅生[1] 

机构地区：[1]中国电子科技集团公司第26研究所,重庆400060

出　　处：《压电与声光》2012年第2期303-306,共4页Piezoelectrics & Acoustooptics

摘　　要：提出了一种多路低相差输出捷变频率源的设计方案,给出了系统原理框图、软件设计思路及控制流程,实际测试结果表明,十路锁相直接数字频率合成(DDS)模块输出信号间的相差小于±3°,输出跳频时间为17.2μs,相位噪声≤-109dBc/Hz@1kHz。该方案具有控制灵活,相位噪声低,跳频时间短,多路输出信号相差小的优点,同时有很强的实用性和可扩展性。目前该方案己在工程中得到验证,实际使用效果良好。The designing scheme of a multi-output low phase difference agile frequency source has been proposed in this paper.The system schematic diagram,software design and the control flow chart have been presented.The experimental results show that the phase difference of ten path output of PLL DDS module is less than ±3°,transient time is 17.2 μs,and phase noise is equal to or less than-109 dBc/Hz@1 kHz.The proposed project has the advantages of easy to control,low phase noise,fast hopping and low phase difference between multi-output signals;furthermore it has good practicability and expansibility.The design has verified in the practical project and has excellent application effects.

关 键 词：直接数字频率合成(DDS) 锁相环(PLL) 频率源 相位差 多路输出 

分 类 号：TN743[电子电信—电路与系统]