全相位FRM陷波原理及其DSP Builder实现  

Principle of All-Phase FRM Notching and Its Implementation Based on DSP Builder

作　　者：吕卫[1] 崔海涛[1] 黄翔东[1] 

机构地区：[1]天津大学电子信息工程学院,天津300072

出　　处：《天津大学学报》2012年第4期331-337,共7页Journal of Tianjin University(Science and Technology)

基　　金：国家自然科学基金资助项目(60802048);天津市应用基础及前沿技术研究计划重点资助项目(10JCZDJC16100)

摘　　要：为设计出陷波点可精确控制、具有高陷波深度及低硬件复杂度的陷波器,提出了一种结合频率响应屏蔽(FRM)技术与全相位滤波技术的高效陷波器实现结构.在分析双相移组合全相位陷波器陷波深度不足的基础上,指出原型滤波器和屏蔽滤波器内含的单窗全相位卷积窗是陷波深度得以大幅度增大的根本原因,理论推导出陷波器频率响应表达式,证明了在平移参数λ取非1/2整数倍的情况下,提出的陷波结构无需任何补偿和校正措施,其陷波深度高达约-200,dB.借助Altera开发工具DSP Builder对所提出的陷波结构进行建模、仿真,产生QuartusⅡ能够识别的VHDL源程序,利用ModelSim进行RTL级仿真,综合、适配并下载至FPGA芯片.实验结果验证了设计方法的正确性和实用性.To design a notch filter with precisely tunable notching point,high notching depth and low hardware com-plexity,the implementation structure of a high efficiency notch filter was proposed,which combined techniques of frequency response masking（FRM）and all-phase filtering.Based on the analysis of double phase-shift combination all-phase notch filter＇s insufficient notching depth,it was pointed out that the significantly increased notching depth was essentially caused by all-phase single convolution window,which was inside prototype filter and masking filter.Moreover,the expression of notch filter frequency response was theoretically derived,and it was testified that at-tenuation at notching frequency could reach about-200,dB without any compensation or corrective measures,even if the shifting parameter λ was not an integer multiple of 1/2.The proposed design model was also built through run-ning DSP Builder,where the QuartusⅡcompatible VHDL source program was generated,then register transport level（RTL）grade simulation was carried on to the model in ModelSim.After completing synthesis and specifying the pin of device,the program was downloaded to FPGA.Experimental results verified the proposed method＇s correct-ness and practicality.

关 键 词：频率响应屏蔽 全相位 陷波器 衰减特性 DSPBUILDER FPGA 

分 类 号：TN911.72[电子电信—通信与信息系统]