基于国产SoPC平台的外部总线的设计与实现  

Design and Implementation of the Peripheral Bus Based on Reconfigurable Platform

作　　者：蔡一茂[1] 赵元富[1] 兰利东[1] 

机构地区：[1]北京微电子技术研究所,北京100076

出　　处：《微电子学与计算机》2012年第5期90-94,共5页Microelectronics & Computer

摘　　要：可重构的SoC(system-on-a-chip)是嵌入式系统发展的一个重要方向,它不仅可以达到较高的性能而且更加的灵活.介绍了一种国产的SoPC(System on a Programmable Chip)平台,并基于此平台提出了一种用于重构计算的外部总线结构.通过该总线,可以通过改变不同的IP(intellectual property)核来组成新的系统.同时回顾总结了部分动态可重构的步骤并完成了一个完整的系统,最后给出了可重构系统的测试结果.Reconfiguration system-on-a-chip（SoC） is an important trend of embedded system. It is not only to achieve the higher performance but also flexible enough. In this paper, a SoPC（System on a Programmable Chip） platform is introduced and a new kind of peripheral bus used for reconfigurable computing is proposed. Using this peripheral bus, we can form a new embedded system easily by changing different intellectual property （IP） cores in a short time. This paper also overviews the process of partial dynamic reconfiguration and accomplishes a reconfigurable system. Finally, we give a result of the reconfiguration time in embedded systems.

关 键 词：部分动态可重构 嵌入式系统 外部总线 可重构片上系统 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]