A threshold voltage analytical model for high-k gate dielectric MOSFETs with fully overlapped lightly doped drain structures  

作　　者：马飞 刘红侠 匡潜玮 樊继斌 

机构地区：[1]Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Material and Devices,School of Microelectronics,Xidian University

出　　处：《Chinese Physics B》2012年第5期596-601,共6页中国物理B（英文版）

基　　金：Project supported by the National Natural Science Foundation of China(Grant Nos.60936005 and 61076097);the Cultivation Fund of the Key Scientific and Technical Innovation Project,Ministry of Education of China(Grant No.708083);the Fundamental Research Funds for the Central Universities of China(Grant No.20110203110012)

摘　　要：We investigate the influence of voltage drop across the lightly doped drain（LDD） region and the built-in potential on MOSFETs,and develop a threshold voltage model for high-k gate dielectric MOSFETs with fully overlapped LDD structures by solving the two-dimensional Poisson＇s equation in the silicon and gate dielectric layers.The model can predict the fringing-induced barrier lowering effect and the short channel effect.It is also valid for non-LDD MOSFETs.Based on this model,the relationship between threshold voltage roll-off and three parameters,channel length,drain voltage and gate dielectric permittivity,is investigated.Compared with the non-LDD MOSFET,the LDD MOSFET depends slightly on channel length,drain voltage,and gate dielectric permittivity.The model is verified at the end of the paper.We investigate the influence of voltage drop across the lightly doped drain（LDD） region and the built-in potential on MOSFETs,and develop a threshold voltage model for high-k gate dielectric MOSFETs with fully overlapped LDD structures by solving the two-dimensional Poisson＇s equation in the silicon and gate dielectric layers.The model can predict the fringing-induced barrier lowering effect and the short channel effect.It is also valid for non-LDD MOSFETs.Based on this model,the relationship between threshold voltage roll-off and three parameters,channel length,drain voltage and gate dielectric permittivity,is investigated.Compared with the non-LDD MOSFET,the LDD MOSFET depends slightly on channel length,drain voltage,and gate dielectric permittivity.The model is verified at the end of the paper.

关 键 词：threshold voltage high-k gate dielectric fringing-induced barrier lowering short channeleffect 

分 类 号：TN386.1[电子电信—物理电子学] TN322.8