一种用于通用处理器结构优化的矩阵乘法性能模型  

Matrix Multiplication Performance Model for Optimizing General-purpose Processor Architecture

作　　者：朱海涛[1,2] 李玲[2] 陈云霁[2] 钱诚[2] 

机构地区：[1]中国科学技术大学计算机科学与技术学院,合肥230027 [2]中国科学院计算技术研究所微处理器中心,北京100190

出　　处：《小型微型计算机系统》2012年第5期981-986,共6页Journal of Chinese Computer Systems

基　　金：国家科技重大专项项目(2009ZX01028-002-003;2009ZX01029-001-003)资助

摘　　要：矩阵乘法作为高性能计算中的关键组成部分,是一种具有计算和访存密集特点的典型应用,因此优化矩阵乘法的性能对通用处理器是非常重要的.为了提高矩阵乘法的性能,本文提出了一种性能模型,用于预测通用处理器上矩阵乘法的执行时间.该模型反映了矩阵乘法执行时间与通用处理器的运算部件、访存带宽、寄存器个数等结构参数之间的关系,可以指导处理器结构的优化来平衡计算和访存能力、提高执行速度.基于该模型本文给出了在一个优化的通用处理器结构中,寄存器个数和访存带宽应满足的理论下界.本文在Godson-3B处理器平台上对该性能模型进行了验证,实验结果表明矩阵乘法执行时间的预测精确度达到95%以上.基于该模型,本文还提出了一种对Godson-3B结构进行优化的方法,使矩阵乘法的执行时间减少了50%左右.Dense Matrix Multiplication（GEMM） plays an important role in high performance computing,as a representative application intensive in both computation and memory access,optimizing the GEMM performance is important for a General-Purpose Processor（GPP）.To improve the GEMM performance of GPP,a performance model is proposed to estimate the overall runtime of GEMM on a GPP.The model gives the relationship between GEMM overall runtime and GPP architecture parameters,such as computational ability,memory bandwidth,register number and so on.The performance model can guide the architecture optimization for improving GEMM performance.Base on the model,two theorems on optimization of architecture parameters are deduced,which gives the lower bound of register number and memory bandwidth.The performance model is validated by experiment results on Godson-3B processor,which is an industrial GPP.According to the performance model,an optimization technique is proposed in Godson-3B design,and the GEMM execution time reduces about 50%.

关 键 词：矩阵乘法 性能模型 通用处理器 结构优化 

分 类 号：TP301[自动化与计算机技术—计算机系统结构]