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出 处:《Journal of Semiconductors》2012年第5期120-125,共6页半导体学报(英文版)
基 金:Project supported by the National High-Tech Research and Development Program of China(No.2009AA011606);the National Natural Science Foundation of China(No.60976023)
摘 要:This paper proposes a new low power structure to improve the trade-off between the bandwidth and the power consumption of a programmable gain amplifier(PGA).The PGA consists of three-stage amplifiers, which includes a variable gain amplifier and DC offset cancellation circuits.The cutoff frequency of the DC offset cancellation circuits can be changed from 4 to 80 kHz.The chip was fabricated in 0.13μm CMOS technology. Measurement results showed that the gain of the PGA can be programmed from -5 to 60 dB.At the gain setting of 60 dB,the bandwidth can be tuned from 1 to 10 MHz,while the power consumption can be programmed from 850μA to 3.2 mA at a supply voltage of 1.2 V.Its in-band OIP3 result is at 14 dBm.This paper proposes a new low power structure to improve the trade-off between the bandwidth and the power consumption of a programmable gain amplifier(PGA).The PGA consists of three-stage amplifiers, which includes a variable gain amplifier and DC offset cancellation circuits.The cutoff frequency of the DC offset cancellation circuits can be changed from 4 to 80 kHz.The chip was fabricated in 0.13μm CMOS technology. Measurement results showed that the gain of the PGA can be programmed from -5 to 60 dB.At the gain setting of 60 dB,the bandwidth can be tuned from 1 to 10 MHz,while the power consumption can be programmed from 850μA to 3.2 mA at a supply voltage of 1.2 V.Its in-band OIP3 result is at 14 dBm.
关 键 词:low power DC offset programmable gain amplifier software defined radio
分 类 号:TN925[电子电信—通信与信息系统]
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