检索规则说明:AND代表“并且”;OR代表“或者”;NOT代表“不包含”;(注意必须大写,运算符两边需空一格)
检 索 范 例 :范例一: (K=图书馆学 OR K=情报学) AND A=范并思 范例二:J=计算机应用与软件 AND (U=C++ OR U=Basic) NOT M=Visual
作 者:李德尧[1]
出 处:《仪表技术》2012年第5期15-18,22,共5页Instrumentation Technology
摘 要:该系统以单片机和FPGA为核心控制器件,实现了波形采集、存储与回放功能。整个系统由信号调理、比较电路、采集存储、数据处理、人机交互等模块组成。信号调理模块采用高速低躁声运放AD8038实现高阻输入、幅度控制;比较电路采用LM311实现被采集信号周期的测量;数据采集模块采用AD5540芯片,在FPGA时序控制下采样;C8051F020单片机作为总控制器,与FP-GA内部的双口RAM和读写信号相结合,实现数据的存储,以及回放前数据的读取;信号输出部分采用DA芯片THS5651和高速运放AD8039相结合,实现了低输出阻抗和信号幅度的控制。经测试,系统功能齐全,波形完整,回放频率非常准确。It uses microcontroller and FPGA as the core control device to achieve a waveform acquisition, storage and playback in the system. The system consists of modules of signal conditioning, comparator, acquisition and storage, data processing, human-computer interaction and other modules. The signal conditioning module uses high-speed low noise op-amp AD8038 to achieve high-impedance input amplitude control. The comparator selects LM311 to measure signal cycles, and the data acquisition module use AD5540 chip to sample under the control of the timing in the FPGA. C8051F020 MCU, the master control devices, combining with dual-port RAM inside the FPGA and read and write sig- nals, realize data storage and read before playback. Signal output section uses DA chip THS5651 combined with high- speed op-amp AD8039 to realize low output impedance and the control of signal amplitude. Tests prove that the system has complete waveform and accurate playback frequency.
关 键 词:C8051F020 FPGA 数据采集 数据存储与回放
分 类 号:TN7[电子电信—电路与系统]
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在链接到云南高校图书馆文献保障联盟下载...
云南高校图书馆联盟文献共享服务平台 版权所有©
您的IP:216.73.216.222